<p>Shiv Nadar University is a comprehensive, multidisciplinary, research-focused, and student-centric University offering a full range of academic programs at the undergraduate, postgraduate and doctoral level. With state-of-the-art infrastructure, the University comprises of academic wings, sophisticated labs, international standard sports facilities, amphitheaters, auditorium, conference rooms and smart classrooms. The University&rsquo;s goal is to become internationally recognized for the quality of its research and creative endeavors and their applicability to improving quality of life, generating new insights and expanding the boundaries of human knowledge creativity. Committed to excellence in teaching, research and service, the University aims to serve the higher education needs of India and the world beyond.</p>

Shiv Nadar University

Electrical Engineering

(SoE) School of Engineering

World University root node

Solid-state electronics

Drain current model for nanoscale double-gate MOSFETs

A CAD-compatible closed form approximation for the inversion charge areal density in double-gate MOSFETs

IEEE transactions on electron devices

An Improvement to the Numerical Robustness of the Surface Potential Approximation for Double-Gate MOSFETs

Drain current model including velocity saturation for symmetric double-gate MOSFETs

Closed form current and conductance model for symmetric double-gate MOSFETs using field-dependent mobility and body doping

Drain current model for undoped symmetric double-gate FETs using a velocity saturation model with exponent n= 2

IEICE transactions on electronics

Parasitic effects in multi-gate MOSFETs

ECS Transactions

Parasitic effects depending on shape of spacer region on FinFETs