An algorithm, implementable in parallel, for sign detection in nonredundant residue number systems is presented. The new approach in this paper completely avoids the expensive process of the mixed radix conversion (MRC), yielding a significant saving in the process time. An advancement in LSI technology supports the possible parallel realization of the algorithm. © 1986.

Saroj Kaushik

Computer Science and Engineering

(SoE) School of Engineering

<p>Shiv Nadar University is a comprehensive, multidisciplinary, research-focused, and student-centric University offering a full range of academic programs at the undergraduate, postgraduate and doctoral level. With state-of-the-art infrastructure, the University comprises of academic wings, sophisticated labs, international standard sports facilities, amphitheaters, auditorium, conference rooms and smart classrooms. The University&rsquo;s goal is to become internationally recognized for the quality of its research and creative endeavors and their applicability to improving quality of life, generating new insights and expanding the boundaries of human knowledge creativity. Committed to excellence in teaching, research and service, the University aims to serve the higher education needs of India and the world beyond.</p>