"Strong Snapback" in DeNMOS transistors leads to weak ESD performance which is often represented by low It2 and strong die to die dependence. We report here the first experimental evidence that this can be controlled with introduction of source-resistance Rs. A new microscopic model has been analyzed to understand the physics of strong snapback and explain the experimental observations. Impact of current crowding phenomenon and role of adding a resistor across the source and ground has been broadly addressed in this paper. Also the current crowding phenomenon has been macroscopically modeled and a circuit model has been established. © 2010 IEEE.

Amitabh Chatterjee

Electrical Engineering

(SoE) School of Engineering

F. Brewer

H. Gossner

S. Pendharkar

C. Duvvury

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Shiv Nadar University

Robust high current ESD performance of nano-meter scale DeNMOS by source ballasting

IEEE International Reliability Physics Symposium Proceedings