Static metrics are often used to characterize read stability and write-ability of an SRAM cell. In this paper, two major dynamic SRAM metrics: critical read stability (TREAD) and critical writeability (TWRITE) are discussed and correlated with static metrics. For correlation between dynamic and static metrics, variability analysis is carried out at time-zero and after NBTI degradation of the SRAM cell. Shift in correlation factor is compared for before and after NBTI degradation. Assessment of correlation between dynamic and static metrics is used to identify those static metrics which best capture the dynamic behavior of the cell. © 2018 IEEE.

Sonal Singhal

Electrical Engineering

(SoE) School of Engineering

Chaudhari S.P.

Shaik J.B.

Goel N.

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Shiv Nadar University

Proceedings - 2018 IEEE 4th International Symposium on Smart Electronic Systems, iSES 2018

Continuous scaling of CMOS technology has led to reliability issues and process variability that affect the circuit performance of the SRAM cell. The dynamic behavior of SRAM cells are characterized by critical read-stability (Tread) and critical write-ability (Twrite) while the Static Noise Margins (SNMs) are deduced by the static metrics that are the key performance metrics. The work in this paper demonstrates the cumulative impact of process variability and Negative Bias Temperature Instability (NBTI) degradation on the dynamic metrics of the SRAM cell under varied temperature conditions. Degradation due to NBTI is incorporated by considering different activity factors (α) for the dynamic metrics. Time-zero or process variability is performed for fresh-case, symmetric and asymmetric degradation by Monte Carlo run simulations using foundry models in addition to examining the effect of correlation with their corresponding static metrics. © Springer Nature Singapore Pte Ltd 2020.

Lecture Notes in Electrical Engineering

Analyzing the impact of nbti and process variability on dynamic sram metrics under temperature variations

Critical Read Stability (TREAD) and Critical Writeability (TWRITE) are two SRAM metrics which can characterize the dynamic behavior of read and write operations. In this paper, the impact of NBTI on TREAD and TWRITE is shown. Worst-case use conditions are identified by varying the relative degradation of the two p-FETs. Monte-Carlo simulations using foundry models (High-k Metal Gate planar MOSFET) are performed to analyze time-zero variability for different use conditions. The dynamic metrics TREAD and TWRITE are correlated with static metrics SVNM and BWTV respectively for worst-case use conditions. Degradation trend of TREAD and TWRITE is then discussed for worst and symmetric NBTI degradation cases by varying ΔVTH. © 2018 IEEE.

INDICON 2018 - 15th IEEE India Council International Conference

Analyzing Impact of NBTI and Time-Zero Variability on Dynamic SRAM Metrics

2013 IEEE International Reliability Physics Symposium (IRPS)

Intrinsic transistor reliability improvements from 22nm tri-gate technology

IEEE Journal of Solid-State Circuits

Characterization of Dynamic SRAM Stability in 45 nm CMOS

Large-Scale SRAM Variability Characterization in 45 nm CMOS

Microelectronics Reliability

Impacts of NBTI and PBTI on SRAM static/dynamic noise margins and cell failure probability

Proceeding of the thirteenth international symposium on Low power electronics and design - ISLPED '08

Analyzing static and dynamic write margin for nanometer SRAMs

Correlation of dynamic and static metrics of SRAM cell under time-zero variability and after NBTI degradation