Continuous scaling of CMOS technology has led to reliability issues and process variability that affect the circuit performance of the SRAM cell. The dynamic behavior of SRAM cells are characterized by critical read-stability (Tread) and critical write-ability (Twrite) while the Static Noise Margins (SNMs) are deduced by the static metrics that are the key performance metrics. The work in this paper demonstrates the cumulative impact of process variability and Negative Bias Temperature Instability (NBTI) degradation on the dynamic metrics of the SRAM cell under varied temperature conditions. Degradation due to NBTI is incorporated by considering different activity factors (α) for the dynamic metrics. Time-zero or process variability is performed for fresh-case, symmetric and asymmetric degradation by Monte Carlo run simulations using foundry models in addition to examining the effect of correlation with their corresponding static metrics. © Springer Nature Singapore Pte Ltd 2020.