A computational study of effect of solder geometric parameters on the stress generation in microelectronic circuits of Light Emitting Diodes is presented. The stress developed in the SAC (SnAgCu) solders is a function of the solder height used in the packaging. This parameter has restriction in usage due to geometrical constraints and hence it becomes a critical parameter in assessing the stress level in the packages. The plastic stresses generated in the viscoplastic SAC solders due to thermal loading are mostly responsible for the stress generation in the GaN LED layer. The residual or the post operational stress level in the GaN LEDs can be a critical parameter in understanding the light output from it. The performance may change due to the generation of defects, which is due to the residual stresses induced in the die. Hence, the residual stress level and its propagation from solder up to GaN LEDs is analyzed to reduce package stress which is presented in this work. The objective of this work is also to provide analysis related to packaging and reliability related issues on the basis of residual thermal stresses and to provide a parametric study on the basis of the interconnects used in it in order to enhance its stability as well as performance. © 2017 IEEE.