We have studied electrically active defects in buried layers, produced by heavy ion implantation in silicon, using both conventional deep level transient spectroscopy (DLTS) and an isothermal spectroscopic technique called time analyzed transient spectroscopy operated in constant capacitance mode (CC-TATS). We show that CC-TATS is a more reliable method than DLTS for characterization of the heavily damaged buried layers. The major trap produced in the buried layers in p-type Si by MeV Ar+ implantation is found to have an energy level at Ev+0.52 eV. This trap, believed to be responsible for compensation in the damaged layer, shows exponential capture dynamics. We observed an unusually high thermal activation energy for capture, which is attributed to a macroscopic energy barrier for carriers to reach the buried layer. We observe two other majority carrier traps, and also a minority carrier trap possibly due to inversion within the depletion layer. © 1997 American Institute of Physics.