This paper proposes a design of low-power and low-noise CMOS neural recording amplifier with an open-loop configuration. The proposed design has been simulated using CMOS 0.18μm process. The proposed design with the signal folding technique, when compared to the closed-loop configured neural amplifier, has adequately minimized the total power consumption. The performance metrics such as gain, bandwidth, and input referred noise is also finely optimized. © 2018 IEEE.